The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs.
Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. For example, a three dimensional transistor, such as a fin-like field-effect transistor (FinFET), has been introduced to replace a planar transistor. Since the fins of FinFETs become thinner and thinner, the processing steps used to fabricate the FinFETs may produce undesirable and unintended consequences. For example, the outermost fins in a FinFET may bend or bow outwardly after some thermal annealing processes such as isolation oxide curing and consolidation due to the different and non-balanced stress applied to the inner fins and outer fins of a FinFET, which changes the fin pitch between fins and degrades yield.